1. Technical Field
The present invention generally relates to semiconductor devices and to methods of fabricating semiconductor devices, and more particularly, to fin pitch scaling in FinFETs to double or quadruple a number of fins and electrically isolate the same.
2. Background Information
Fin Field-Effect Transistors (FinFET) devices are currently being developed to replace conventional planar metal oxide semiconductor field-effect transistors (MOSFETs) in advanced complementary metal oxide semiconductor (CMOS) technology due to their improved short-channel effect immunity and higher on-current to off-current ratio (Ion/Ioff). As is known, the term “fin” refers to a raised semiconductor structure with respect to the substrate, typically a vertical structure within or upon which are formed, for instance, one or more FinFETs or other fin devices, such as passive devices, including capacitors, diodes, etc.
Further enhancements in fin device structures and fabrication methods therefor continue to be pursued for enhanced performance and commercial advantage.